Algorithms of Digital Image Processing in Reconfigurable Architectures FPGA

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Diana Margarita Córdova Esparza
Ernesto García Domínguez
Arturo Moreno Báez

Abstract

This article presents information concerning the development of algorithms of Digital Image Processing by using arrays of field-programmable gate array (FPGA). Processing modules were designed in the hardware description language (VHDL)

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How to Cite
Córdova Esparza, D. M., García Domínguez, E., & Moreno Báez, A. (2009). Algorithms of Digital Image Processing in Reconfigurable Architectures FPGA. Difu100ci@, Revista De difusión científica, ingeniería Y tecnologías, 2(3), 61-66. Retrieved from http://difu100cia.uaz.edu.mx/index.php/difuciencia/article/view/165
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