ADS-B Receiver implementation in Verilog

Abstract

In this work, an ADS-B receiver system was implemented on an FPGA using the Verilog hardware description language. The work is divided into two phases: the first involves the implementation of the ADS-B receiver using software tools, which are necessary to translate the functional blocks of the system; the second involves transferring these blocks to hardware, utilizing the Zybo Z7 board and the Verilog development platform.